Two chiplets are connected via a 2.5D silicon interposer. A cache line fetch across the interposer takes 20 ns, whereas a local fetch takes 4 ns. If a workload has a 15% probability of requiring a cross-chiplet fetch, what is the statistically expected memory fetch latency?
Explanation: The expected latency is the weighted average of the two fetch types: (Probability of Local Local Latency) + (Probability of Remote Remote Latency) = (0.85 4ns) + (0.15 20ns) = 3.4ns + 3.0ns = 6.4ns.
