A cryptographic IP core operates at a nominal voltage of 1.0V and a clock frequency of 2.0 GHz, consuming 200 mW of dynamic power. To enter a low-power state, the power management unit scales the voltage down to 0.8V and the frequency down to 1.0 GHz. Assuming the workload (activity factor) and switched capacitance remain identical, what is the new dynamic power consumption?
