MIPS is described as which architecture
MIPS stands for Microprocessor without Interlocked Pipelined Stages, and it is one of the classic examples of a RISC (Reduced Instruction Set Computer) architecture. RISC designs feature a small, highly optimized set of instructions, fixed instruction lengths, a large number of general-purpose registers, and a strict load/store model (instructions only operate on registers, requiring explicit instructions to load data from memory or store it back).
