A SystemVerilog class contains two random 4-bit unsigned variables, a and b. A constraint block specifies: constraint c1 { a + b == 4'd10; a < b; }. If the randomize() function is called, what is the exact probability that the variable a is assigned the value 2?
The variables are 4-bit, ranging from 0 to 15. The sum must be exactly 10, and a must be strictly less than b. The valid pairs (a, b) satisfying both conditions are: (0, 10), (1, 9), (2, 8), (3, 7), and (4, 6). The pair (5, 5) is invalid because a is not less than b. There are exactly 5 valid solution sets. Assuming a uniform distribution solver, the probability of a being 2 is 1 out of 5, which is 20%.